The present invention is directed to integrated circuits and their processing for the manufacture of semiconductor devices. More particularly, the invention provides a method and system for monitoring implantation of silicon bearing species in semiconductor substrates for integrated circuit device structures. But it would be recognized that the invention has a much broader range of applicability. For example, the invention can be applied to a variety of devices such as dynamic random access memory devices (DRAM), static random access memory devices (SRAM), application specific integrated circuit devices (ASIC), microprocessors and microcontrollers, flash memory devices, and others.
Integrated circuits or “ICs” have evolved from a handful of interconnected devices fabricated on a single chip of silicon to millions of devices. Current ICs provide performance and complexity far beyond what was originally imagined. In order to achieve improvements in complexity and circuit density (i.e., the number of devices capable of being packed onto a given chip area), the size of the smallest device feature, also known as the device “geometry”, has become smaller with each generation of ICs. Semiconductor devices are now being fabricated with features less than a quarter of a micron across.
Increasing circuit density has not only improved the complexity and performance of ICs but has also provided lower cost parts to the consumer. An IC fabrication facility can cost hundreds of millions, or even billions, of dollars. Each fabrication facility will have a certain throughput of wafers, and each wafer will have a certain number of ICs on it. Therefore, by making the individual devices of an IC smaller, more devices may be fabricated on each wafer, thus increasing the output of the fabrication facility. Making devices smaller is very challenging, as each process used in IC fabrication has a limit. That is to say, a given process typically only works down to a certain feature size, and then either the process or the device layout needs to be changed.
As merely an example, implantation is a process that often needs to be changed with feature size. Implantation is often used to introduce impurities to change an electrical characteristic of the semiconductor substrate from a first type to second type. Here, P-type impurities and N-type impurities are often introduced into the substrate during one or more steps in the process of manufacturing integrated circuits. Such impurities are often characterized by dose and energy level, as well as other parameters, to control and maintain the manufacturing process. Implantation dose is often measured using a tool from Thermal Wave, such as the TP 500, but can also be others. Silicon bearing impurities have also been used with the implantation process. Such silicon bearing impurities are often used in salicide Si implant and Si pre-amorphous. Unfortunately, many limitations exist in monitoring the dose of the silicon bearing impurities. That is, small changes in implantation doses often cannot be detected using conventional measurement tools. Accordingly, it becomes difficult to maintain monitor dosage levels of silicon bearing impurities in conventional processing such as implantation tools.
From the above, it is seen that an improved technique for processing semiconductor devices is desired.